NSF award 2540782 · Stanford University

CAREER: Error-Resilient Algorithmic Design for Emerging Hardware Technologies

Final report due

28 September 2031

in 1,806 days · The award ends on 31 May 2031.

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Decide about an extension31 Jan 2031in 1566 days
award ending 2031-05-31 · Research.gov
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Extension request16 Apr 2031in 1641 days
award ending 2031-05-31 · Research.gov
PAPPG 24-1: “at least 45 days prior to the end date”
No-cost extension notice21 May 2031in 1676 days
award ending 2031-05-31 · Research.gov
PAPPG 24-1: “at least ten calendar days prior to the end date”
Final report due28 Sep 2031in 1806 days
award ending 2031-05-31 · Research.gov
PAPPG 24-1: “no later than 120-days following the end date of the award”
Project outcomes report due28 Sep 2031in 1806 days
award ending 2031-05-31 · Research.gov
PAPPG 24-1: “no later than 120 days following the end date”
Award is closed out28 Sep 2031in 1806 days
award ending 2031-05-31 · Research.gov
PAPPG 24-1: “financially closed out 120 days after their expiration date”

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NSF lists this award's end date as 31 May 2031.
NSF rules say the final report is due no later than 120 days after that.
So the final report is due by 28 September 2031.

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Award card

Award number: 2540782
Period of support: 1 Jun 2026 – 31 May 2031
Amount: $711,672
Awardee: Stanford University, Stanford, CA
Program: Software & Hardware Foundation
Directorate: CSE

Abstract

Running artificial intelligence workloads requires vast amounts of memory and energy, motivating a new generation of memory and transistor technologies that pack more storage closer to compute and operate at lower power. These emerging devices are promising candidates for accelerating AI, but they experience data corruption at rates far higher than conventional hardware, making them unreliable without costly…

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